In the circuit below, delay of the EXOR and ANDLogic gates are 20 s and 10 s respectively, then the wave y' and y (with initial condition y = 1) will be :

In the circuit below, delay of the EXOR and ANDLogic gates are 20 s a

1.	In the circuit below, delay of the EXOR and ANDLogic gates are 20 s and 10 s respectively, then the wave y' and y (with initial condition y = 1) will be :
A.	<img src="/_files/images/electronics-and-communication-engineering/exam-question-papers/4-788-45-3.png">
B.	<img src="/_files/images/electronics-and-communication-engineering/exam-question-papers/4-788-45-4.png">
C.	<img src="/_files/images/electronics-and-communication-engineering/exam-question-papers/4-788-45-5.png">
D.	<img src="/_files/images/electronics-and-communication-engineering/exam-question-papers/4-788-45-6.png">
Answer» C. <img src="/_files/images/electronics-and-communication-engineering/exam-question-papers/4-788-45-5.png">