In ECL the fanout capability is – McqOptions

MCQOPTIONS

Saved Bookmarks

→ Computer Science Engineering (CSE)
→ Software Design Modeling
→ In ECL the fanout capability is

1.	In ECL the fanout capability is
A.	high
B.	low
C.	zero
D.	sometimes high and sometimes low
Answer» B. low

Discussion

No Comment Found

Related MCQs

A major advantage of DTL over the earlier resistor–transistor logic is the
Moore machine has states than a mealy machine.
In D register, ‘D’ stands for
State transition happens in every clock cycle.
Why do the D flip-flops receive its designation or nomenclature as ‘Data Flip-flops’?
Each “0” entry in a K-map square represents:
Binary subtraction of 101101 – 001011 = ?
Each “1” entry in a K-map square represents:
TTL circuits with “totem-pole” output stage minimize
In a NAND based S’-R’ latch, if S’=1 & R’=1 then the state of the latch is

Related Topics

Software Design Modeling

Information Cyber Security

Software Testing And Quality Assurance

Neural Networks And Fuzzy Control

Digital Logic Circuits

Object Oriented Programming

Usability Engineering

Artificial Intelligence And Robotics

Computer Networking

Data Analysis

Recent Visits

Reply to Comment

Name *

Email *

Comment *

© Copyright 2025 McqOptions. All rights reserved.

Terms & Conditions
Privacy Policy
Disclaimer
Contact Us