MCQOPTIONS
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MCQOPTIONS
This section includes 18 Mcqs, each offering curated multiple-choice questions to sharpen your Internet of things (IoT) knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
In synchronous operation characters must be provided on time if not ______ error occurs. |
| A. | Overrun error |
| B. | Underrun error |
| C. | Framing error |
| D. | Parity error |
| Answer» C. Framing error | |
| 2. |
In idle line multiprocessor mode, a precise idle period can be generated to create efficient address character identifiers. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 3. |
Which bit in control register defines the address bit or idle line multiprocessor protocol mode? |
| A. | MM |
| B. | URXWIE |
| C. | URXIE |
| D. | RXWake |
| Answer» B. URXWIE | |
| 4. |
WHICH_BIT_IN_CONTROL_REGISTER_DEFINES_THE_ADDRESS_BIT_OR_IDLE_LINE_MULTIPROCESSOR_PROTOCOL_MODE??$ |
| A. | MM |
| B. | URXWIE |
| C. | URXIE |
| D. | RXWake |
| Answer» B. URXWIE | |
| 5. |
In synchronous operation characters must be provided on time if not ______ error occurs.$ |
| A. | Overrun error |
| B. | Underrun error |
| C. | Framing error |
| D. | Parity error |
| Answer» C. Framing error | |
| 6. |
In_idle_line_multiprocessor_mode,_a_precise_idle_period_can_be_generated_to_create_efficient_address_character_identifiers.$ |
| A. | True |
| B. | False |
| Answer» B. False | |
| 7. |
BSC stands for ____________ |
| A. | Binary Service Communication |
| B. | Bandwidth Synchronous Communication |
| C. | Binary Synchronous Communication |
| D. | Bandwidth Service Communication |
| Answer» D. Bandwidth Service Communication | |
| 8. |
STR stands for___________ |
| A. | Synchronous Transmit Rate |
| B. | Synchronous Target Rate |
| C. | Synchronous Target Receive |
| D. | Synchronous Transmit Receive |
| Answer» E. | |
| 9. |
SDLC stands for ___________ |
| A. | Synchronous Data Link Control |
| B. | Synchronous Data Level Control |
| C. | Synchronous Data Level Coordinator |
| D. | Synchronous Data Link Coordinator |
| Answer» B. Synchronous Data Level Control | |
| 10. |
HDLC stands for ___________ |
| A. | High level Data Link Control |
| B. | High level Data Level Control |
| C. | High level Data Link Coordinator |
| D. | High level Data Link Commutator |
| Answer» B. High level Data Level Control | |
| 11. |
How many asynchronous multiprocessor protocols are present? |
| A. | 4 |
| B. | 3 |
| C. | 2 |
| D. | 5 |
| Answer» D. 5 | |
| 12. |
The USART module supports ________ multiprocessor communication modes when the asynchronous mode is used. |
| A. | one |
| B. | two |
| C. | three |
| D. | five |
| Answer» C. three | |
| 13. |
The secondary implementation uses a fixed second clock divided which is divided by ______________ |
| A. | 4 |
| B. | 8 |
| C. | 32 |
| D. | 16 |
| Answer» E. | |
| 14. |
What is the timing of X? |
| A. | 1/32 to 1/64 times of BRCKL |
| B. | 1/42 to 1/63 times of BRCKL |
| C. | 1/32 to 1/63 times of BRCKL |
| D. | 1/32 to 1/56 times of BRCKL |
| Answer» D. 1/32 to 1/56 times of BRCKL | |
| 15. |
During receiving operation what does URXD have? |
| A. | Positive edge |
| B. | Negative edge |
| C. | Level edge |
| D. | Either raising or falling edge |
| Answer» B. Negative edge | |
| 16. |
Which of the following needs a clock? |
| A. | Only Asynchronous |
| B. | Only synchronous |
| C. | Both synchronous and Asynchronous |
| D. | Sometimes Synchronous |
| Answer» C. Both synchronous and Asynchronous | |
| 17. |
USART provides a synchronous mode that is not in UART? |
| A. | True |
| B. | False |
| Answer» B. False | |
| 18. |
What is the protocol used by USART? |
| A. | RS232 |
| B. | RS232C |
| C. | RS485 |
| D. | RS422 |
| Answer» C. RS485 | |