Totem pole outputs _________ be connected __________ because ____________.

should, in series, certain applications may require higher output voltage

can, in parallel, sometimes higher current is required

cannot, together, if the outputs are in opposite states excessively high currents can damage one or both devices

should, in series, certain applications may require higher output voltage

can, together, together they can handle larger load currents and higher output voltages

When the output of a standard TTL gate is HIGH, it can ___________________.

source 16 mA of current to no more than 10 attached gates

sink 16 mA of current from the attached input gates

source 400 A of current to no more than 10 attached gates

source 16 mA of current to no more than 10 attached gates

sink a maximum of 400 A from no more than 10 load gates

CMOS logic is probably the best all-around circuitry because of its:

low power consumption and very high noise immunity

What quantities must be compatible when interfacing two different logic families?

both the voltages and the currents

both the power dissipation and the impedance

PMOS and NMOS ____________________________.

are enhancement type CMOS devices used to produce a series of high-speed logic known as 74HC

represent MOSFET devices utilizing either P-channel or N-channel devices exclusively within a given gate

are enhancement type CMOS devices used to produce a series of high-speed logic known as 74HC

represent positive and negative MOS type devices that can be operated from differential power supplies and are compatible with operational amplifiers

A digital logic device used as a buffer should have what input/output characteristics?

high input impedance and high output impedance

low input impedance and high output impedance

low input impedance and low output impedance

high input impedance and low output impedance

28 + Mcqs in Standard Logic Devices in Electronics Page 1 McqOptions

1.	Totem pole outputs _________ be connected __________ because ____________.
A.	can, in parallel, sometimes higher current is required
B.	cannot, together, if the outputs are in opposite states excessively high currents can damage one or both devices
C.	should, in series, certain applications may require higher output voltage
D.	can, together, together they can handle larger load currents and higher output voltages
Answer» C. should, in series, certain applications may require higher output voltage

Discussion

2.	Integrated-injection logic offers high component density and is easier to fabricate than TTL.
A.	1
B.
Answer» B.

Discussion

3.	Schottky TTL logic gates overcome the problem of saturation delay time.
A.	1
B.
Answer» B.

Discussion

4.	The output current capability of a single 7400 NAND gate when HIGH is called _____________.
A.	source current
B.	sink current
C.	IOH
D.	source current or IOH
Answer» B. sink current

Discussion

5.	A three-state output TTL can have three possible outputs: LOW, HIGH, or FLOATING.
A.	1
B.
Answer» C.

Discussion

6.	One example of the use of a Schmitt trigger is as a(n) _____
A.	astable oscillator
B.	transition pulse generator
C.	pulse shaper
D.	buffer
Answer» D. buffer

Discussion

7.	An open collector output can ________ current, but it cannot ___________________.
A.	sink, source current
B.	source, sink current
C.	sink, source voltage
D.	source, sink voltage
Answer» B. source, sink current

Discussion

8.	When the output of a standard TTL gate is HIGH, it can ___________________.
A.	sink 16 mA of current from the attached input gates
B.	source 400 A of current to no more than 10 attached gates
C.	source 16 mA of current to no more than 10 attached gates
D.	sink a maximum of 400 A from no more than 10 load gates
Answer» C. source 16 mA of current to no more than 10 attached gates

Discussion

9.	5400 TTL series logic chips are made to military specifications.
A.	1
B.
Answer» B.

Discussion

10.	An undefined state, neither high nor low, is called _________.
A.	don't care
B.	floating
C.	minimum state
D.	noise
Answer» C. minimum state

Discussion

11.	The number of inputs that a gate output can drive without possible logic errors is the _______.
A.	propagation delay
B.	noise margin
C.	speed-power product
D.	fanout
Answer» E.

Discussion

12.	CMOS logic is probably the best all-around circuitry because of its:
A.	packing density
B.	low power consumption
C.	very high noise immunity
D.	low power consumption and very high noise immunity
Answer» E.

Discussion

13.	A TTL totem pole circuit is designed so that the output transistors are:
A.	always on together
B.	providing phase splitting
C.	providing voltage regulation
D.	never on together
Answer» E.

Discussion

14.	In order to get a HIGH or a LOW output from an open-collector gate, an external _________ must be connected between +VCC and the collector.
A.	pull-down resistor
B.	pull-up resistor
C.	diode
D.	buffer
Answer» C. diode

Discussion

15.	CMOS circuits consume less power than TTL circuits.
A.	1
B.
C.	1
D.
Answer» B.

Discussion

16.	Totem pole output circuits can change states faster than open-collector output circuits.
A.	1
B.
Answer» B.

Discussion

17.	What quantities must be compatible when interfacing two different logic families?
A.	only the currents
B.	both the voltages and the currents
C.	only the voltages
D.	both the power dissipation and the impedance
Answer» C. only the voltages

Discussion

18.	NMOS devices use MOSFETs to implement the full range of logic gates using the universal NAND gate.
A.	1
B.
C.	1
D.
Answer» C. 1

Discussion

19.	Large-scale integration (LSI) ICs contain between ______ and _______ interconnected components.
A.	15,000, 150,000
B.	1,500, 15,000
C.	180, 1,000
D.	180, 1,500
Answer» C. 180, 1,000

Discussion

20.	Delay times and current/voltage values remain constant regardless of temperature or other operating conditions for robust circuits like TTL.
A.	1
B.
Answer» C.

Discussion

21.	The time needed for an output to change as the result of an input change is known as:
A.	noise immunity
B.	fanout
C.	propagation delay
D.	rise time
Answer» D. rise time

Discussion

22.	Low power consumption achieved by CMOS circuits is due to which construction characteristic?
A.	complementary pairs
B.	connecting pads
C.	DIP packages
D.	small-scale integration
Answer» B. connecting pads

Discussion

23.	PMOS and NMOS ____________________________.
A.	represent MOSFET devices utilizing either P-channel or N-channel devices exclusively within a given gate
B.	are enhancement type CMOS devices used to produce a series of high-speed logic known as 74HC
C.	represent positive and negative MOS type devices that can be operated from differential power supplies and are compatible with operational amplifiers
D.	none of the above
Answer» B. are enhancement type CMOS devices used to produce a series of high-speed logic known as 74HC

Discussion

24.	The problem of interfacing IC logic families that have different supply voltages (VCCs) can be solved by using a:
A.	level-shifter
B.	tri-state shifter
C.	translator
D.	level-shifter or translator
Answer» E.

Discussion

25.	Which digital IC package type makes the most efficient use of printed circuit board space?
A.	SMT
B.	TO can
C.	flat pack
D.	DIP
Answer» B. TO can

Discussion

26.	When an IC has two rows of parallel connecting pins, the device is referred to as:
A.	a QFP
B.	a DIP
C.	a phase splitter
D.	CMOS
Answer» C. a phase splitter

Discussion

27.	The range of a valid LOW input is:
A.	0.0 V to 0.4 V
B.	0.4 V to 0.8 V
C.	0.4 V to 1.8 V
D.	0.4 V to 2.4 V
Answer» C. 0.4 V to 1.8 V

Discussion

28.	A digital logic device used as a buffer should have what input/output characteristics?
A.	high input impedance and high output impedance
B.	low input impedance and high output impedance
C.	low input impedance and low output impedance
D.	high input impedance and low output impedance
Answer» E.

Discussion

Explore topic-wise MCQs in Electronics.

Totem pole outputs _ be connected because ______.

Integrated-injection logic offers high component density and is easier to fabricate than TTL.

Schottky TTL logic gates overcome the problem of saturation delay time.

The output current capability of a single 7400 NAND gate when HIGH is called _____________.

A three-state output TTL can have three possible outputs: LOW, HIGH, or FLOATING.

One example of the use of a Schmitt trigger is as a(n) _____

An open collector output can current, but it cannot ___________.

When the output of a standard TTL gate is HIGH, it can ___________________.

5400 TTL series logic chips are made to military specifications.

An undefined state, neither high nor low, is called _________.

The number of inputs that a gate output can drive without possible logic errors is the _______.

CMOS logic is probably the best all-around circuitry because of its:

A TTL totem pole circuit is designed so that the output transistors are:

In order to get a HIGH or a LOW output from an open-collector gate, an external _________ must be connected between +VCC and the collector.

CMOS circuits consume less power than TTL circuits.

Totem pole output circuits can change states faster than open-collector output circuits.

What quantities must be compatible when interfacing two different logic families?

NMOS devices use MOSFETs to implement the full range of logic gates using the universal NAND gate.

Large-scale integration (LSI) ICs contain between and _ interconnected components.

Delay times and current/voltage values remain constant regardless of temperature or other operating conditions for robust circuits like TTL.

The time needed for an output to change as the result of an input change is known as:

Low power consumption achieved by CMOS circuits is due to which construction characteristic?

PMOS and NMOS ____________________________.

The problem of interfacing IC logic families that have different supply voltages (VCCs) can be solved by using a:

Which digital IC package type makes the most efficient use of printed circuit board space?

When an IC has two rows of parallel connecting pins, the device is referred to as:

The range of a valid LOW input is:

A digital logic device used as a buffer should have what input/output characteristics?

Explore topic-wise MCQs in Electronics.

Totem pole outputs _________ be connected __________ because ____________.

Integrated-injection logic offers high component density and is easier to fabricate than TTL.

Schottky TTL logic gates overcome the problem of saturation delay time.

The output current capability of a single 7400 NAND gate when HIGH is called _____________.

A three-state output TTL can have three possible outputs: LOW, HIGH, or FLOATING.

One example of the use of a Schmitt trigger is as a(n) _____

An open collector output can ________ current, but it cannot ___________________.

When the output of a standard TTL gate is HIGH, it can ___________________.

5400 TTL series logic chips are made to military specifications.

An undefined state, neither high nor low, is called _________.

The number of inputs that a gate output can drive without possible logic errors is the _______.

CMOS logic is probably the best all-around circuitry because of its:

A TTL totem pole circuit is designed so that the output transistors are:

In order to get a HIGH or a LOW output from an open-collector gate, an external _________ must be connected between +VCC and the collector.

CMOS circuits consume less power than TTL circuits.

Totem pole output circuits can change states faster than open-collector output circuits.

What quantities must be compatible when interfacing two different logic families?

NMOS devices use MOSFETs to implement the full range of logic gates using the universal NAND gate.

Large-scale integration (LSI) ICs contain between ______ and _______ interconnected components.

Delay times and current/voltage values remain constant regardless of temperature or other operating conditions for robust circuits like TTL.

The time needed for an output to change as the result of an input change is known as:

Low power consumption achieved by CMOS circuits is due to which construction characteristic?

PMOS and NMOS ____________________________.

The problem of interfacing IC logic families that have different supply voltages (VCCs) can be solved by using a:

Which digital IC package type makes the most efficient use of printed circuit board space?

When an IC has two rows of parallel connecting pins, the device is referred to as:

The range of a valid LOW input is:

A digital logic device used as a buffer should have what input/output characteristics?

Totem pole outputs _ be connected because ______.

An open collector output can current, but it cannot ___________.

Large-scale integration (LSI) ICs contain between and _ interconnected components.