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This section includes 21 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Circuits knowledge and support exam preparation. Choose a topic below to get started.
1. |
Fundamental mode is another name for ____________ |
A. | Level operation |
B. | Pulse operation |
C. | Clock operation |
D. | Edge operation |
Answer» C. Clock operation | |
2. |
Program counter in a digital computer ____________ |
A. | Counts the number of programs run in the machine |
B. | Counts the number of times a subroutine |
C. | Counts the number of time the loops are executed |
D. | Points the memory address of the current or the next instruction |
Answer» E. | |
3. |
High speed counter is ____________ |
A. | Ring counter |
B. | Ripple counter |
C. | Synchronous counter |
D. | Asynchronous counter |
Answer» D. Asynchronous counter | |
4. |
What is a state diagram? |
A. | It provides the graphical representation of states |
B. | It provides exactly the same information as the state table |
C. | It is same as the truth table |
D. | It is similar to the characteristic equation |
Answer» C. It is same as the truth table | |
5. |
MOD-16 counter requires ________ no. of states. |
A. | 8 |
B. | 4 |
C. | 16 |
D. | 32 |
Answer» D. 32 | |
6. |
Normally, the synchronous counter is designed using ____________ |
A. | S-R flip-flops |
B. | J-K flip-flops |
C. | D flip-flops |
D. | T flip-flops |
Answer» C. D flip-flops | |
7. |
The duty cycle of the most significant bit from a 4-bit (0–9) BCD counter is ____________ |
A. | 20% |
B. | 50% |
C. | 10% |
D. | 80% |
Answer» B. 50% | |
8. |
The minimum number of flip-flops that can be used to construct a modulus-5 counter is ____________ |
A. | 3 |
B. | 8 |
C. | 5 |
D. | 10 |
Answer» B. 8 | |
9. |
The ________ counter in the Altera library has controls that allow it to count up or down, and perform synchronous parallel load and asynchronous cascading. |
A. | 74134 |
B. | LPM |
C. | Synchronous |
D. | AHDL |
Answer» C. Synchronous | |
10. |
In general, when using a scope to troubleshoot digital systems, the instrument should be triggered by ____________ |
A. | The A channel or channel 1 |
B. | The vertical input mode, when using more than one channel |
C. | The system clock |
D. | Line sync, in order to observe troublesome power line glitches |
Answer» D. Line sync, in order to observe troublesome power line glitches | |
11. |
A sequential circuit design is used to ____________ |
A. | Count up |
B. | Count down |
C. | Decode an end count |
D. | Count in a random order |
Answer» E. | |
12. |
Modulus refers to ____________ |
A. | A method used to fabricate decade counter units |
B. | The modulus of elasticity, or the ability of a circuit to be stretched from one mode to another |
C. | An input on a counter that is used to set the counter state, such as UP/DOWN |
D. | The maximum number of states in a counter sequence |
Answer» E. | |
13. |
MOD-16_COUNTER_REQUIRES__________NO._OF_STATES.?$ |
A. | 8 |
B. | 4 |
C. | 16 |
D. | 32 |
Answer» D. 32 | |
14. |
High speed counter is$ |
A. | Ring counter |
B. | Ripple counter |
C. | Synchronous counter |
D. | Asynchronous counter |
Answer» D. Asynchronous counter | |
15. |
Normally, synchronous counter is designed usin? |
A. | S-R flip-flops |
B. | J-K flip-flops |
C. | D flip-flops |
D. | T flip-flops |
Answer» C. D flip-flops | |
16. |
The duty cycle of the most significant bit from a 4-bit (0–9) BCD counter is$ |
A. | 20% |
B. | 50% |
C. | 10% |
D. | 80% |
Answer» B. 50% | |
17. |
The minimum number of flip-flops that can be used to construct a modulus-5 counter is |
A. | 3 |
B. | 8 |
C. | 5 |
D. | 10 |
Answer» B. 8 | |
18. |
Which counters are often used whenever pulses are to be counted and the results displayed in decimal? |
A. | Synchronous |
B. | Bean |
C. | Decade |
D. | BCD |
Answer» E. | |
19. |
In general, when using a scope to troubleshoot digital systems, the instrument should be triggered by |
A. | The A channel or channel 1 |
B. | The vertical input mode, when using more than one channel |
C. | The system clock |
D. | Line sync, in order to observe troublesome power line glitches |
Answer» D. Line sync, in order to observe troublesome power line glitches | |
20. |
A sequential circuit design is used to |
A. | Count up |
B. | Count down |
C. | Decode an end count |
D. | Count in a random order |
Answer» E. | |
21. |
Modulus refers to |
A. | A method used to fabricate decade counter units |
B. | The modulus of elasticity, or the ability of a circuit to be stretched from one mode to another |
C. | An input on a counter that is used to set the counter state, such as UP/DOWN |
D. | The maximum number of states in a counter sequence |
Answer» E. | |