MCQOPTIONS
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MCQOPTIONS
This section includes 8 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Circuits knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
PLA refers to _________ |
| A. | Programmable Loaded Array |
| B. | Programmable Array Logic |
| C. | Programmable Logic Array |
| D. | Programmed Array Logic |
| Answer» D. Programmed Array Logic | |
| 2. |
In PLD, there are provisions to perform interconnections of the gates internally, because of _________ |
| A. | High reliability |
| B. | High conductivity |
| C. | The desired logic implementation |
| D. | The desired output |
| Answer» D. The desired output | |
| 3. |
Logic circuits can also be designed using _________ |
| A. | RAM |
| B. | ROM |
| C. | PLD |
| D. | PLA |
| Answer» D. PLA | |
| 4. |
PLD contains a large number of _________ |
| A. | Flip-flops |
| B. | Gates |
| C. | Registers |
| D. | All of the Mentioned |
| Answer» E. | |
| 5. |
The full form of PLD is _________ |
| A. | Programmable Load Devices |
| B. | Programmable Logic Data |
| C. | Programmable Logic Devices |
| D. | Programmable Loaded Devices |
| Answer» D. Programmable Loaded Devices | |
| 6. |
IC 4116 is organised as _________ |
| A. | 512 * 4 |
| B. | 16 * 1 |
| C. | 32 * 4 |
| D. | 64 * 2 |
| Answer» D. 64 * 2 | |
| 7. |
How many address bits are required to select memory location in the Memory decoder? |
| A. | 4 KB |
| B. | 8 KB |
| C. | 12 KB |
| D. | 16 KB |
| Answer» D. 16 KB | |
| 8. |
The first step in the design of memory decoder is __________ |
| A. | Selection of a EPROM |
| B. | Selection of a RAM |
| C. | Address assignment |
| D. | Data insertion |
| Answer» D. Data insertion | |