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This section includes 11 Mcqs, each offering curated multiple-choice questions to sharpen your Operating System knowledge and support exam preparation. Choose a topic below to get started.
1. |
How does the Hardware trigger an interrupt? |
A. | Sending signals to CPU through a system bus |
B. | Executing a special program called interrupt program |
C. | Executing a special program called system program |
D. | Executing a special operation called system call |
Answer» B. Executing a special program called interrupt program | |
2. |
In the layered approach of Operating Systems __________ |
A. | Bottom Layer(0) is the User interface |
B. | Highest Layer(N) is the User interface |
C. | Bottom Layer(N) is the hardware |
D. | Highest Layer(N) is the hardware |
Answer» C. Bottom Layer(N) is the hardware | |
3. |
In an interrupt driven input/output __________ |
A. | the CPU uses polling to watch the control bit constantly, looping to see if a device is ready |
B. | the CPU writes one data byte to the data register and sets a bit in control register to show that a byte is available |
C. | the CPU receives an interrupt when the device is ready for the next byte |
D. | the CPU runs a user written code and does accordingly |
Answer» D. the CPU runs a user written code and does accordingly | |
4. |
In a programmed input/output(PIO) __________ |
A. | the CPU uses polling to watch the control bit constantly, looping to see if a device is ready |
B. | the CPU writes one data byte to the data register and sets a bit in control register to show that a byte is available |
C. | the CPU receives an interrupt when the device is ready for the next byte |
D. | the CPU runs a user written code and does accordingly |
Answer» B. the CPU writes one data byte to the data register and sets a bit in control register to show that a byte is available | |
5. |
In a memory mapped input/output __________ |
A. | the CPU uses polling to watch the control bit constantly, looping to see if a device is ready |
B. | the CPU writes one data byte to the data register and sets a bit in control register to show that a byte is available |
C. | the CPU receives an interrupt when the device is ready for the next byte |
D. | the CPU runs a user written code and does accordingly |
Answer» C. the CPU receives an interrupt when the device is ready for the next byte | |
6. |
DMA is used for __________ |
A. | High speed devices(disks and communications network) |
B. | Low speed devices |
C. | Utilizing CPU cycles |
D. | All of the mentioned |
Answer» B. Low speed devices | |
7. |
What is an interrupt vector? |
A. | It is an address that is indexed to an interrupt handler |
B. | It is a unique device number that is indexed by an address |
C. | It is a unique identity given to an interrupt |
D. | None of the mentioned |
Answer» B. It is a unique device number that is indexed by an address | |
8. |
What is an ISR? |
A. | Information Service Request |
B. | Interrupt Service Request |
C. | Interrupt Service Routine |
D. | Information Service Routine |
Answer» D. Information Service Routine | |
9. |
What is a trap/exception? |
A. | hardware generated interrupt caused by an error |
B. | software generated interrupt caused by an error |
C. | user generated interrupt caused by an error |
D. | none of the mentioned |
Answer» C. user generated interrupt caused by an error | |
10. |
How does the software trigger an interrupt? |
A. | Sending signals to CPU through bus |
B. | Executing a special operation called system call |
C. | Executing a special program called system program |
D. | Executing a special program called interrupt trigger program |
Answer» C. Executing a special program called system program | |
11. |
The initial program that is run when the computer is powered up is called __________ |
A. | boot program |
B. | bootloader |
C. | initializer |
D. | bootstrap program |
Answer» E. | |