MCQOPTIONS
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MCQOPTIONS
This section includes 3 Mcqs, each offering curated multiple-choice questions to sharpen your Microprocessors knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
In fetch-decode unit, the number of parallel decoders that accept the stream of fetched instructions and decode them is |
| A. | 1 |
| B. | 2 |
| C. | 3 |
| D. | 4 |
| Answer» D. 4 | |
| 2. |
The unit that accepts the sequence of instructions from the instruction cache as input is |
| A. | fetch-decode unit |
| B. | dispatch-execute unit |
| C. | retire unit |
| D. | none |
| Answer» B. dispatch-execute unit | |
| 3. |
Because of Pentium s superscalar architecture, the number of instructions that are executed per clock cycle is |
| A. | 1 |
| B. | 2 |
| C. | 3 |
| D. | 4 |
| Answer» C. 3 | |