Explore topic-wise MCQs in Analog Circuits.

This section includes 15 Mcqs, each offering curated multiple-choice questions to sharpen your Analog Circuits knowledge and support exam preparation. Choose a topic below to get started.

1.

If Channel Length Modulation is present and gm is the transconductance of M1, what happens to the output resistance of for a fixed V2 in the following circuit?

A. (1 + (gm * ro)) * Rs + ro
B. (1 + (gm * ro)) * ro + Rs
C. (ro + 2) * Rs
D. (1 + (gm * ro)) * Rs
Answer» B. (1 + (gm * ro)) * ro + Rs
Discussion
2.

If the internal resistance of the current source is finite, what will happen to the voltage gain. for the following C.S. stage, if K is doubled?

A. The voltage gain reduces by 1/2
B. The voltage gain remains the same
C. The voltage gain increases
D. The voltage gain decreases
Answer» C. The voltage gain increases
Discussion
3.

If both the MOSFET’s are identical and have channel length modulation, what is the output impedance at node S?

A. R1 || ro1 || ro2
B. R1 + (ro1 || ro2)
C. R1 + (ro1 + ro2)
D. R1 || (ro1 + ro2)
Answer» B. R1 + (ro1 || ro2)
Discussion
4.

If both the MOSFET’s are identical, what is the voltage gain from V1 to node S?

A. Vcc – 2R1 * µn Cox * (W/L) * (V1-Vth)2
B. Vcc R1 * \(\frac{1}{2}\)µn Cox (W/L) * (V1-Vth)2
C. Vcc – R1 * µn Cox (W/L) * (V1-Vth)2
D. Vcc – 4R1 * \(\frac{1}{2}\)µn Cox * (W/L) * (V1-Vth)2
Answer» D. Vcc – 4R1 * \(\frac{1}{2}\)µn Cox * (W/L) * (V1-Vth)2
Discussion
5.

If the transconductance of M1 is 5S, voltage gain for the following degenerated CS stage is _____

A. 2.45
B. 1.25
C. 1.45
D. 2.25
Answer» C. 1.45
Discussion
6.

If the output impedance of the current source is Ri, what is the output impedance of the CS stage shown below, if channel length modulation is neglected?

A. (1 + gm * (R1 || R2)) * Ri + (R1 || R2)
B. {R1 * (R2 + ro)} || Ri
C. R1 || R2
D. 0
Answer» B. {R1 * (R2 + ro)} || Ri
Discussion
7.

What is the overall input resistance of the CS stage shown below?

A. R3
B. R3 || R1
C. 2 * R3
D. Infinite
Answer» B. R3 || R1
Discussion
8.

If the output voltage is sensed at the collector, which of the following option perfectly describes the stage shown below?

A. A degenerated C.S. stage
B. A C.S. stage
C. A shunted C.S. stage
D. An open C.S. stage
Answer» B. A C.S. stage
Discussion
9.

In the following C.S. stage shown below, what is the voltage gain from the gate to the drain of M1 if λ>0?

A. gm * ro
B. gm * 2R1
C. gm * R1||ro
D. gm * R1
Answer» D. gm * R1
Discussion
10.

In the following C.S. stage shown below, what is the output impedance, if channel length modulation is neglected?

A. 2ro
B. 5
C. R1
D. 0
Answer» D. 0
Discussion
11.

In the following C.S. stage shown below, what is the output impedance if λ>0?

A. ro
B. 0
C. R1
D. R1 || ro
Answer» E.
Discussion
12.

In the following C.S. stage shown below, what is the input impedance if λ>0?

A. Infinite
B. 0
C. Very low
D. ro
Answer» B. 0
Discussion
13.

In the following C.S. stage shown below, what is the input impedance (ideally) if channel length modulation is neglected?

A. Infinite
B. Very high
C. Very low
D. Cannot be determined
Answer» B. Very high
Discussion
14.

In the following C.S. stage shown below, what is the transconductance?

A. \(\frac{1}{2}\)µnCox*(W/L)(V1-Vth)
B. 3µnCox*(W/L)(V1-Vth)
C. µnCox*(W/L)(V1-Vth)
D. 2µnCox*(W/L)(V1-Vth)
Answer» B. 3µnCox*(W/L)(V1-Vth)
Discussion
15.

Neglecting Channel Length Modulation, what is the voltage gain from the gate to the drain of M1?

A. gm * R1
B. gm * 2R1
C. gm * R1 || RO
D. 3gm * R1
Answer» B. gm * 2R1
Discussion