MCQOPTIONS
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MCQOPTIONS
This section includes 17 Mcqs, each offering curated multiple-choice questions to sharpen your Computer Fundamentals knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
The number of sign bits in a 32-bit IEEE format __________ |
| A. | 1 |
| B. | 11 |
| C. | 9 |
| D. | 23 |
| Answer» B. 11 | |
| 2. |
What is the full form of D In The D-flip Flop in Memory and Processor? |
| A. | Digital |
| B. | Direct |
| C. | Delay |
| D. | Durable |
| Answer» D. Durable | |
| 3. |
What is the full form of PC in Memory and Processor? |
| A. | Program Changer |
| B. | Program Counter |
| C. | Performance Counter |
| D. | Performance Changer |
| Answer» C. Performance Counter | |
| 4. |
Brain of computer is ____________ |
| A. | Control unit |
| B. | Arithmetic and Logic unit |
| C. | Central Processing Unit |
| D. | Memory |
| Answer» D. Memory | |
| 5. |
Causing the CPU to step through a series of micro operations is called _________ |
| A. | Execution |
| B. | Runtime |
| C. | Sequencing |
| D. | Pipelining |
| Answer» D. Pipelining | |
| 6. |
The functions of execution and sequencing are performed by using ______________ |
| A. | Input Signals |
| B. | Output Signals |
| C. | Control Signals |
| D. | CPU |
| Answer» D. CPU | |
| 7. |
What is the full form of MBR in Memory and Processor? |
| A. | Main Buffer Register |
| B. | Memory Buffer Routine |
| C. | Main Buffer Routine |
| D. | Memory Buffer Register |
| Answer» E. | |
| 8. |
The transfer between CPU and Cache is ______________ |
| A. | Block transfer |
| B. | Word transfer |
| C. | Set transfer |
| D. | Associative transfer |
| Answer» C. Set transfer | |
| 9. |
MAR stands for ___________ |
| A. | Memory address register |
| B. | Main address register |
| C. | Main accessible register |
| D. | Memory accessible register |
| Answer» B. Main address register | |
| 10. |
The architecture that uses a tighter coupling between the compiler and the processor is ____________ |
| A. | EPIC |
| B. | Multi-core |
| C. | RISC |
| D. | CISC |
| Answer» B. Multi-core | |
| 11. |
In ____________ mapping, the data can be mapped anywhere in the Cache Memory. |
| A. | Associative |
| B. | Direct |
| C. | Set Associative |
| D. | Indirect |
| Answer» B. Direct | |
| 12. |
What is the high speed memory between the main memory and the CPU called? |
| A. | Register Memory |
| B. | Cache Memory |
| C. | Storage Memory |
| D. | Virtual Memory |
| Answer» C. Storage Memory | |
| 13. |
The number of sign bits in a 32-bit IEEE format is ____ |
| A. | 1 |
| B. | 11 |
| C. | 9 |
| D. | 23 |
| Answer» B. 11 | |
| 14. |
New CPU whose instruction set includes the instruction set of its predecessor CPU is said to be ___________ with its predecessor. |
| A. | fully compatible |
| B. | forward compatible |
| C. | compatible |
| D. | backward compatible |
| Answer» E. | |
| 15. |
If M denotes the number of memory locations and N denotes the word size, then an expression that denotes the storage capacity is ______________ |
| A. | M*N |
| B. | M+N |
| C. | 2M+N |
| D. | 2M-N |
| Answer» B. M+N | |
| 16. |
A circuitry that processes that responds to and processes the basic instructions that are required to drive a computer system is ________ |
| A. | Memory |
| B. | ALU |
| C. | CU |
| D. | Processor |
| Answer» E. | |
| 17. |
Any electronic holding place where data can be stored and retrieved later whenever required is ____________ |
| A. | memory |
| B. | drive |
| C. | disk |
| D. | circuit |
| Answer» B. drive | |