MCQOPTIONS
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MCQOPTIONS
This section includes 4 Mcqs, each offering curated multiple-choice questions to sharpen your Microprocessors knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
The service to an interrupt will be delayed if it appears during the execution of |
| A. | RETI instruction |
| B. | Instruction that writes to IE register |
| C. | Instruction that writes to IP register |
| D. | All of the mentioned |
| Answer» E. | |
| 2. |
For an interrupt to be guaranteed served it should have duration of |
| A. | one machine cycle |
| B. | three machine cycles |
| C. | two machine cycles |
| D. | four machine cycles |
| Answer» D. four machine cycles | |
| 3. |
If two interrupts, of higher priority and lower priority occur simultaneously, then the service provided is for |
| A. | interrupt of lower priority |
| B. | interrupt of higher priority |
| C. | lower & higher priority interrupts |
| D. | none of the mentioned |
| Answer» C. lower & higher priority interrupts | |
| 4. |
The minimum duration of the active low interrupt pulse for being sensed without being lost must be |
| A. | greater than one machine cycle |
| B. | equal to one machine cycle |
| C. | greater than 2 machine cycles |
| D. | equal to 2 machine cycles |
| Answer» C. greater than 2 machine cycles | |