MCQOPTIONS
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This section includes 10 Mcqs, each offering curated multiple-choice questions to sharpen your Microprocessors knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
A_TIMER_THAT_DERIVES_PULSE_FOR_REFRESHING_ACTION_OR_TIME_FOR_WHICH_A_DYNAMIC_RAM_CELL_CAN_HOLD_DATA_CHARGE_LEVEL_PRACTICALLY_CONSTANT_IS?$ |
| A. | constant timer |
| B. | data managing timer |
| C. | refresh timer |
| D. | qualitative timer |
| Answer» D. qualitative timer | |
| 2. |
If_‘n’_denotes_the_number_of_rows_that_are_to_be_refreshed_in_a_single_refresh_interval,_‘td’_denotes_the_range_of_time_it_may_take_then,_refresh_time_(tr)_can_be_defined_as$# |
| A. | n*td |
| B. | td/n |
| C. | n/td |
| D. | td<sup>n</sup> |
| Answer» C. n/td | |
| 3. |
The number of memory chips that are enabled at a time for refresh activity i? |
| A. | 2 |
| B. | 4 |
| C. | 8 |
| D. | more than 1 |
| Answer» E. | |
| 4. |
Memory refresh activity is |
| A. | initialised by processor |
| B. | initialised by external bus master |
| C. | initialised by refresh mechanism |
| D. | initialised either by processor or by external bus |
| Answer» D. initialised either by processor or by external bus | |
| 5. |
The field in which dynamic RAM is more complicated than static RAM is |
| A. | complexity |
| B. | interfacing circuit |
| C. | execution unit |
| D. | cost |
| Answer» C. execution unit | |
| 6. |
The process of refreshing the data in the RAM to reduce the possibility of data loss is known as |
| A. | data cycle |
| B. | regain cycle |
| C. | retain cycle |
| D. | refresh cycle |
| Answer» E. | |
| 7. |
To store the charge as a representation of data, the basic dynamic RAM cell uses |
| A. | resistor |
| B. | capacitor |
| C. | diode |
| D. | transistor |
| Answer» D. transistor | |
| 8. |
If a typical static RAM cell requires 6 transistors then corresponding dynamic RAM requires |
| A. | 1 transistor along with capacitance |
| B. | 2 transistors along with resistance |
| C. | 3 transistors along with diode |
| D. | 2 transistors along with capacitance |
| Answer» B. 2 transistors along with resistance | |
| 9. |
Whenever a large memory is required in a microcomputer system, the memory subsystem is generally designed using |
| A. | Static RAM |
| B. | Dynamic RAM |
| C. | Both static and dynamic RAM |
| D. | ROM |
| Answer» C. Both static and dynamic RAM | |
| 10. |
The advantage of dynamic RAM is |
| A. | high packing density |
| B. | low cost |
| C. | less power consumption |
| D. | all of the mentioned |
| Answer» E. | |