MCQOPTIONS
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MCQOPTIONS
This section includes 10 Mcqs, each offering curated multiple-choice questions to sharpen your Microprocessors knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
THE_REGISTER_OF_8257_THAT_CAN_ONLY_BE_WRITTEN_IN_IS?$ |
| A. | DMA address register |
| B. | Terminal count register |
| C. | Mode set register |
| D. | Status register |
| Answer» D. Status register | |
| 2. |
The_operation_that_can_be_performed_on_the_status_register_is$ |
| A. | write operation |
| B. | read operation |
| C. | read and write operations |
| D. | none of the mentioned |
| Answer» C. read and write operations | |
| 3. |
The priority of the channels varies frequently i? |
| A. | rotating priority scheme |
| B. | fixed priority scheme |
| C. | rotating priority and fixed priority scheme |
| D. | none of the mentioned |
| Answer» B. fixed priority scheme | |
| 4. |
In 8257, if each device connected to a channel is assigned to a fixed priority then it is said to be in |
| A. | rotating priority scheme |
| B. | fixed priority scheme |
| C. | rotating priority and fixed priority scheme |
| D. | none of the mentioned |
| Answer» C. rotating priority and fixed priority scheme | |
| 5. |
The number of clock cycles required for an 8257 to complete a transfer is |
| A. | 2 |
| B. | 4 |
| C. | 8 |
| D. | none of the mentioned |
| Answer» C. 8 | |
| 6. |
The continuous transfer may be interrupted by an external device by pulling down the signal |
| A. | HRQ |
| B. | DACK (active low) |
| C. | DACK (active high) |
| D. | HLDA |
| Answer» E. | |
| 7. |
If more than one channel requests service simultaneously, the transfer will occur as |
| A. | multi transfer |
| B. | simultaneous transfer |
| C. | burst transfer |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 8. |
To indicate the I/O device that its request for the DMA transfer has been honored by the CPU, the DMA controller pulls |
| A. | HLDA signal |
| B. | HRQ signal |
| C. | DACK (active low) |
| D. | DACK (active high) |
| Answer» D. DACK (active high) | |
| 9. |
The bus is available when the DMA controller receives the signal |
| A. | HRQ |
| B. | HLDA |
| C. | DACK |
| D. | All of the mentioned |
| Answer» C. DACK | |
| 10. |
The 8257 is able to accomplish the operation of |
| A. | verifying DMA operation |
| B. | write operation |
| C. | read operation |
| D. | all of the mentioned |
| Answer» E. | |