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This section includes 8 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Circuits knowledge and support exam preparation. Choose a topic below to get started.
1. |
Assume a 4-bit ripple counter has a failure in the second flip-flop such that it locks up . The third and fourth stages will __________ |
A. | Continue to count with correct outputs |
B. | Continue to count but have incorrect outputs |
C. | Stop counting |
D. | Turn into molten silicon |
Answer» D. Turn into molten silicon | |
2. |
A glitch that appears on the decoded output of a ripple counter is often difficult to see on an oscilloscope because of __________ |
A. | It is a random event |
B. | It occurs less frequently than the normal decoded output |
C. | It is very fast |
D. | All of the Mentioned |
Answer» E. | |
3. |
A reliable method for eliminating decoder spikes is the technique called ________ |
A. | Strobing |
B. | Feeding |
C. | Wagging |
D. | Waving |
Answer» B. Feeding | |
4. |
As the number of flip flops are increased, the total propagation delay of __________ |
A. | Ripple counter increases but that of synchronous counter remains the same |
B. | Both ripple and synchronous counters increase |
C. | Both ripple and synchronous counters remain the same |
D. | Ripple counter remains the same but that of synchronous counter increases |
Answer» B. Both ripple and synchronous counters increase | |
5. |
A 4 bit modulo-16 ripple counter uses JK flip-flops. If the propagation delay of each flip-flop is 50 nsec, the maximum clock frequency that can be used is equal to __________ |
A. | 20 MHz |
B. | 10 MHz |
C. | 5 MHz |
D. | 4 MHz |
Answer» D. 4 MHz | |
6. |
The main drawback of a ripple counter is that __________ |
A. | It has a cumulative settling time |
B. | It has a distributive settling time |
C. | It has a productive settling time |
D. | It has an associative settling time |
Answer» B. It has a distributive settling time | |
7. |
A ripple counter s speed is limited by the propagation delay of __________ |
A. | Each flip-flop |
B. | All flip-flops and gates |
C. | The flip-flops only with gates |
D. | Only circuit gates |
Answer» B. All flip-flops and gates | |
8. |
A ripple counter s speed is limited by the propagation delay of ____________ |
A. | Each flip-flop |
B. | All flip-flops and gates |
C. | The flip-flops only with gates |
D. | Only circuit gates |
Answer» B. All flip-flops and gates | |