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This section includes 33 Mcqs, each offering curated multiple-choice questions to sharpen your Electronics knowledge and support exam preparation. Choose a topic below to get started.
1. |
The 1's complement of 101010 is _________. |
A. | 010110 |
B. | 010101 |
C. | 110111 |
D. | 101011 |
Answer» C. 110111 | |
2. |
The 2's complement of 110110 is _________. |
A. | 110100 |
B. | 101010 |
C. | 001011 |
D. | 001010 |
Answer» E. | |
3. |
Adding the two's complement of –11 + (–2) will yield which two's complement answer? |
A. | 1110 1101 |
B. | 1111 1001 |
C. | 1111 0011 |
D. | 1110 1001 |
Answer» D. 1110 1001 | |
4. |
When multiplying in binary the decimal values 13 × 11, what is the third partial product? |
A. | 100000 |
B. | 100001 |
C. | 0000 |
D. | 1011 |
Answer» B. 100001 | |
5. |
Two 4-bit adders could be cascaded to form a(n) ___________. |
A. | 16-bit parallel-adder circuit |
B. | 8-bit parallel-adder circuit |
C. | full-adder circuit |
D. | arithmetic-logic unit |
Answer» C. full-adder circuit | |
6. |
Using the two's complement number system we can add numbers with like signs and obtain the correct result. |
A. | 1 |
B. | |
Answer» C. | |
7. |
If you borrow from a position that contains a 0, you must borrow from the more significant bit that contains a 1. All 0s up to that point become 1s, and the digit last borrowed from becomes a 0. |
A. | 1 |
B. | |
Answer» B. | |
8. |
Two half adders can be combined to form a full adder with no additional gates. |
A. | 1 |
B. | |
Answer» C. | |
9. |
An input to the mode pin of an arithmetic-logic unit (ALU) determines if the function will be _________. |
A. | one's complemented |
B. | positive or negative |
C. | with or without carry |
D. | arithmetic or logic |
Answer» E. | |
10. |
The bits of a number that tell how large the number is are called ____________________. |
A. | carry bits |
B. | magnitude bits |
C. | sign bits |
D. | most significant bits |
Answer» C. sign bits | |
11. |
In binary number systems the sign of a number is indicated by _________. |
A. | using a 0 (zero) bit in front of negative numbers |
B. | inverting the bits if the number is negative |
C. | including a sign bit along with the magnitude bits |
D. | placing a negative sign in front of the number |
Answer» D. placing a negative sign in front of the number | |
12. |
How many basic binary subtraction combinations are possible? |
A. | 4 |
B. | 3 |
C. | 2 |
D. | 1 |
Answer» B. 3 | |
13. |
The carry propagation delay in 4-bit full-adder circuits ____________. |
A. | is normally not a consideration because the delays are usually in the nanosecond range |
B. | is cumulative for each stage and limits the speed at which arithmetic operations are performed |
C. | decreases in direct ratio to the total number of full-adder stages |
D. | increases in direct ratio to the total number of full-adder stages, but is not a factor in limiting the speed of arithmetic operations |
Answer» C. decreases in direct ratio to the total number of full-adder stages | |
14. |
End around carry is an operation in 1's complement subtraction where a 1 is added to the sum of the 1's complement of both numbers. |
A. | 1 |
B. | |
Answer» C. | |
15. |
When multiplying in binary the decimal values 13 √ó 11, what is the third partial product? |
A. | 100000 |
B. | 100001 |
C. | 0 |
D. | 1011 |
Answer» B. 100001 | |
16. |
All digital systems that perform arithmetic operations must indicate _______ and ________ for numbers. |
A. | size, base |
B. | sign, magnitude |
C. | sign, base |
D. | magnitude, base |
Answer» C. sign, base | |
17. |
A full adder adds ____. |
A. | two 2-bit binary numbers |
B. | two 4-bit binary numbers |
C. | two single bits and one carry bit |
D. | two 2-bit numbers and one carry bit |
Answer» D. two 2-bit numbers and one carry bit | |
18. |
The selector inputs to an arithmetic-logic unit (ALU) determine the: |
A. | selection of the IC |
B. | arithmetic or logic function |
C. | data word selection |
D. | clock frequency to be used |
Answer» C. data word selection | |
19. |
The 2's complement of 1101102 is _________. |
A. | 1101002 |
B. | 1010102 |
C. | 10112 |
D. | 10102 |
Answer» E. | |
20. |
The range of an 8-bit two's complement word is from: |
A. | +12810 to –12810 |
B. | –12810 to +12710 |
C. | +12810 to –12710 |
D. | +12710 to –12710 |
Answer» C. +12810 to ‚Äì12710 | |
21. |
A technique to speed parallel addition by eliminating the delay caused by the carry bit propagation is called fast carry, or look-ahead carry. |
A. | 1 |
B. | |
Answer» B. | |
22. |
Adding in binary, the decimal values 26 + 27 will produce a sum of: |
A. | 111010 |
B. | 110110 |
C. | 110101 |
D. | 101011 |
Answer» D. 101011 | |
23. |
The 1's complement of 1010102 is _________. |
A. | 101102 |
B. | 101012 |
C. | 1101112 |
D. | 1010112 |
Answer» C. 1101112 | |
24. |
A full adder adds three bits, a half adder adds 1-1/2 bits. |
A. | 1 |
B. | |
C. | 1 |
D. | |
Answer» C. 1 | |
25. |
The operands in a subtraction operation are the subend and the minuend. |
A. | 1 |
B. | |
Answer» C. | |
26. |
Use the two's complement system to add the signed numbers 11110010 and 11110011. Determine, in decimal, the sign and value of each number and their sum. |
A. | –14 and –13; –27 |
B. | –113 and –114; 227 |
C. | –27 and –13; 40 |
D. | –11 and –16; –27 |
Answer» B. ‚Äì113 and ‚Äì114; 227 | |
27. |
The operands in an addition operation consist of the augend and the addend. |
A. | 1 |
B. | |
Answer» B. | |
28. |
Adding the two's complement of –11 + (–2) will yield which two's complement answer? |
A. | 1110 1101 |
B. | 1111 1001 |
C. | 1111 0011 |
D. | 1110 1001 |
Answer» D. 1110 1001 | |
29. |
One advantage of using the 2's complement system to represent signed numbers is that you ___________. |
A. | can perform subtraction by performing addition |
B. | can perform addition by performing subtraction |
C. | can perform division through repeated subtraction |
D. | none of the above |
Answer» B. can perform addition by performing subtraction | |
30. |
The fast carry or look-ahead carry circuits found in most 4-bit parallel-adder circuits: |
A. | increase ripple delay |
B. | add a 1 to complemented inputs |
C. | reduce propagation delay |
D. | determine sign and magnitude |
Answer» D. determine sign and magnitude | |
31. |
The two's complement system is to be used to add the signed numbers 11110010 and 11110011. Determine, in decimal, the sign and value of each number and their sum. |
A. | –14 and –13; –27 |
B. | –113 and –114; 227 |
C. | –27 and –13; 40 |
D. | –11 and –16; –27 |
Answer» B. ‚Äì113 and ‚Äì114; 227 | |
32. |
Signed binary numbers have one bit that represents the sign, with the remaining bits representing the magnitude. |
A. | 1 |
B. | |
C. | 1 |
D. | |
Answer» B. | |
33. |
When 1100010 is divided by 0101, what will be the decimal remainder? |
A. | 2 |
B. | 3 |
C. | 4 |
D. | 6 |
Answer» C. 4 | |