In figure below assume that the diode and op-amps are ideal. For an input Vin = sin t, the output voltage V0 is:

half wave rectified with a peak value of 1

full wave rectified with a peak value of 1

half wave rectified with a peak value of 1

Increasing the value of RE in a differential amplifier:

increases the differential gain A

increases the common mode gain A

380 + Mcqs in Analog electronics circuits miscellaneous Page 1 McqOptions

1.	The frequency of oscillation for a RC phase shift network is given by:
A.
B.
Answer» D.

Discussion

2.	The frequency of oscillations in a Wien bridge oscillator given by:
A.
B.
C.
Answer» B.

Discussion

3.	When FT is the transistors short-circuit commonemitter current gain-bandwidth, the maximum frequency of oscillations of a transistor will depend on:
A.	(F
B.	)2
C.
D.
E.
Answer» D.

Discussion

4.	In a Hartley oscillator the condition for sustained oscillations is h_fe = L₁ L₂. If there exists mutual inductance M between coils L₁ and L₂, then the above condition will get modified as h_fe
A.
B.
Answer» C.

Discussion

5.	The ideal characteristics of op-amp are: (i) input impedance, R_i = (ii) output impedance, R₀ = (iii) bandwidth impedance, BW = 0 (iv) gain impedance, A = The correct statement are:
A.	(i) and (ii)
B.	(i), (ii) and (iii)
C.	(i) and (iv)
D.	All of these
Answer» D. All of these

Discussion

6.	In the circuit shown below the input offset voltage and input offset current are V_io = 4 mV and I_io = 150 nA. The total output offset voltage is:
A.	479 mV
B.	234 mV
C.	168 mV
D.	116 mV
Answer» B. 234 mV

Discussion

7.	In figure below assume that the diode and op-amps are ideal. For an input V_in = sin t, the output voltage V₀ is:
A.	full wave rectified with a peak value of 1
B.	full wave rectified with a peak value of 1
C.	half wave rectified with a peak value of 1
D.	half wave rectified with a peak value of 1
Answer» D. half wave rectified with a peak value of 1

Discussion

8.	The output voltage v_out of the given circuit, for a given input signal, as shown in the above Figure, will be of the form:
A.	NA
B.	NA
C.	NA
D.	NA
Answer» D. NA

Discussion

9.	If V_i = 2 V, then output V₀ is:
A.	6 V
B.	6 V
C.	3 V
D.	3 V
Answer» E.

Discussion

10.	Calculate value of i₀
A.	18 A
B.	24 A
C.	24 A
D.	36 A
Answer» C. 24 A

Discussion

11.	In a Schmitt trigger the output v_o is limited by Zener diodes. Single V_s is connected to the negative input terminal (v) and v₊ = v_o. The Hysteresis voltage is 1 volt. Triggering takes place for signals going through:
A.	zero volt
B.	0 volt and + 1 volt
C.	0 volt and 1 volt
D.	+ 0.5 volt and 0.5 volt
Answer» E.

Discussion

12.	If V_i = 2 V, then output V₀ is:
A.	3 V
B.	6 V
C.	6 V
D.	3 V
Answer» C. 6 V

Discussion

13.	The LED in the circuit shown below will be on if _i is:
A.	> 10 V
B.	< 10 V
C.	> 5 V
D.	< 5 V
Answer» D. < 5 V

Discussion

14.	In the circuit shown, R = 1 M (C = 0.5 F). V_s is a step voltage of magnitude 0.5 volt, V₀ is given by:
A.	+ 0.5 volt
B.	0.5 volt
C.	+ t volt
D.	t volt
Answer» D. t volt

Discussion

15.	The Hysteresis phenomenon in Schmitt trigger has the following features: (1) It is due to negative feedback (2) Speed of response is achieved (3) In the inverted mode, the circuit triggers at a higher voltage for increasing signals than for decreasing signals (4) Noise signal voltage greater than V_H are cut off, where V_H is the hysteresis voltage (5) Slowly varying signals are converted to output waveform with abrupt changes at two specified level of input signals Of these five statements, the true statements are:
A.	2 and 3 only
B.	2, 3 and 5 only
C.	2, 3 and 4 only
D.	3 and 5 only
Answer» C. 2, 3 and 4 only

Discussion

16.	The phase shift oscillator shown below operate at f = 80 kHz. The value of resistance R_F is:
A.	148 k
B.	236 k
C.	438 k
D.	814 k
Answer» C. 438 k

Discussion

17.	For a given circuit, the value of V_o and A_CL is:
A.	5 V and 1
B.	5 V and 5
C.	0 V and 1
D.	0 V and 5
Answer» B. 5 V and 5

Discussion

18.	The maximum allowable value of V_in for circuit given below. Given gain of the amplifier is 200
A.	400 mV
B.	40 mV
C.	4 V
D.	4000 mV
Answer» C. 4 V

Discussion

19.	In the circuit shown below the op-amp is ideal. If _F = 60, then the total current supplied by the 15 V source is:
A.	123.1 mA
B.	98.3 mA
C.	49.4 mA
D.	168 mA
Answer» D. 168 mA

Discussion

20.	The value of C required for sinusoidal oscillation of frequency 1 kHz in the circuit shown below:
A.
B.
C.	2 F
D.	2
E.	F
Answer» B.

Discussion

21.	Calculate the value of ₀:
A.	6 V
B.	6 V
C.	10 V
D.	10 V
Answer» D. 10 V

Discussion

22.	For the circuit given below V₀:
A.	V
B.
C.	V
D.
E.
Answer» C. V

Discussion

23.	In the op-amp circuit given below the load current i_L is
A.
B.	V
C.	R
Answer» B. V

Discussion

24.	Figure shown a Schmitt trigger circuit op-amp. The output V₀ is limited to + 10 V and 5 V connecting suitably chosen Zener diodes at the output. The lower and upper trigger voltage are respectively:
A.	1 V and 0.5 V
B.	0.5 V and 1.0 V
C.	1 V and 0.5 V
D.	0.5 V and 1.0 V
Answer» B. 0.5 V and 1.0 V

Discussion

25.

Calculate the value of A_d = V₀
(V₁ V₂)

A.

8

B.

6

C.

6

D.

8

Answer» D. 8

Discussion

26.	Calculate V₀
A.	7.5 V
B.	7.5 V
C.	8 V
D.	8 V
Answer» C. 8 V

Discussion

27.	Find V₀
A.	4 V
B.	4 V
C.	5 V
D.	5 V
Answer» B. 4 V

Discussion

28.	In the circuit shown below \| V₀ \| = 1 V to a certain set of values of , R and C. \| V₀ \| will remain as 1 V even if:
A.	None of these
B.	is halved
C.	R is halved
D.	C is doubled
Answer» B. is halved

Discussion

29.	In regard to improving the performance of a BJT differential amplifier, consider the following four statements: (1) The value of ADM is increased by increasing R_E (2) The value of CMRR is increased by increasing R_E (3) Increasing R_E increases A_CM (4) Increasing ₀ and R₀ increases A_DM Of these, the true statements are:
A.	only 1, 2
B.	only 2, 3
C.	only 3, 4
D.	only 2, 4
Answer» E.

Discussion

30.	The bandwidth of an n-stage tuned amplifier with each stage having a bandwidth of B, is given by
A.
B.	B
Answer» D.

Discussion

31.	A differential amplifier has input v₁ = 1050 V and v₂ = 950 V, CMRR = 1000. The error in the differential output is:
A.	10%
B.	1%
C.	0.1%
D.	0.01%
Answer» C. 0.1%

Discussion

32.	The following five statements are made with reference to the cascade amplifier: (1) It is CE followed by CB (2) It is CB followed by CE (3) The load on CE is the input resistance of CB (4) The Miller effect capacitance is increased compared to a CE stage (5) The load on the cascade should be less than that in CE Of the above five statements, the true statements are:
A.	only 1, 3
B.	only 2, 4
C.	only 1, 3, 5
D.	only 2, 4, 5
Answer» B. only 2, 4

Discussion

33.	In the circuit given below, R_f provides:
A.	current series feedback
B.	current shunt feedback
C.	voltage series feedback
D.	voltage shunt feedback
Answer» E.

Discussion

34.	The slew rate of an operational amplifier is 0.5 V/micro sec. The maximum frequency of a sinusoidal input of 2 V_rms that can be handled without excessive distortion is:
A.	3 kHz
B.	30 kHz
C.	300 kHz
D.	2 MHz
Answer» C. 300 kHz

Discussion

35.	Each transistor in the darlington pair shown below has h_FE = 100. The overall h_FE of the composite transistor neglecting leakage current is:
A.	10000
B.	10001
C.	10100
D.	10200
Answer» E.

Discussion

36.	A differential amplifier has R_L = 10 K (equal values in both collectors), hie = 1 K, R_e = 50 K, h_fe = 100. The common mode gain is given by:
A.	500
B.	2
C.	0.2
D.	0.1
Answer» E.

Discussion

37.	Increasing the value of RE in a differential amplifier:
A.	increases the differential gain A
B.	increases the common mode gain A
C.	increases CMRR
D.	decreases CMRR
Answer» D. decreases CMRR

Discussion

38.	In the op amp circuit, V₀ is given by
A.	2 V
B.	8 V
C.
D.	8 V
E.	9 V
Answer» E. 9 V

Discussion

39.	For the op-amp shown in fig below open loop differential gain is A_od = 10³. The output voltage ₀ for _i = 2 V is:
A.	1.996
B.	1.998
C.	2.004
D.	2.006
Answer» B. 1.998

Discussion

40.	In the circuit, shown below I₀ is given by:
A.
Answer» C.

Discussion

41.	A circuit shown below. The largest value of R_L that can be used is:
A.	100
B.	400
C.	2 k
D.	20 k
Answer» C. 2 k

Discussion

42.	For the op-amp circuit shown below the voltage gain A = ₀/ _i is:
A.	8
B.	8
C.	10
D.	10
Answer» B. 8

Discussion

43.	For the circuit shown below gain is A = ₀/ _i = 10. The value of R is:
A.	600 k
B.	450 k
C.	4.5 M
D.	6 M
Answer» C. 4.5 M

Discussion

44.	An op-amp has an open-loop gain of 10⁵ and an openloop upper cut off frequency of 10 Hz. If this op-amp is connected as an amplifier with a closed-loop gain of 100. Then the new upper cut off frequency is:
A.	10 Hz
B.	100 Hz
C.	10 kHz
D.	100 kHz
Answer» D. 100 kHz

Discussion

45.	Calculate ₀
A.	12 V
B.	12 V
C.	18 V
D.	18 V
Answer» B. 12 V

Discussion

46.	Find ₀ for the circuit given below:
A.
B.
Answer» B.

Discussion

47.	The circuit is as shown below: The ideal closed-loop voltage gain is:
A.	1
B.	1
C.
D.	50
Answer» B. 1

Discussion

48.	If open-loop gain is A_od = 999 in the circuit of the closed-loop gain is:
A.	0.999
B.	0.999
C.	1.001
D.	1.001
Answer» C. 1.001

Discussion

49.	The op-amp of figure has a very poor open loop voltage gain of 45 but is otherwise ideal. The gain of the amplifier equals:
A.	5
B.	20
C.	4
D.	4.5
Answer» E.

Discussion

50.	For the circuit shown below, the output voltage is ₀ = 2.5 V in response to input voltage _i = 5 V. The finite open-loop differential gain of the op-amp is:
A.	5 10
B.	250.5
C.	2 10
D.	501
Answer» C. 2 10

Discussion

Explore topic-wise MCQs in Analog Electronic Circuits.

The frequency of oscillation for a RC phase shift network is given by:

The frequency of oscillations in a Wien bridge oscillator given by:

When FT is the transistors short-circuit commonemitter current gain-bandwidth, the maximum frequency of oscillations of a transistor will depend on:

In a Hartley oscillator the condition for sustained oscillations is hfe = L1 L2. If there exists mutual inductance M between coils L1 and L2, then the above condition will get modified as hfe

The ideal characteristics of op-amp are: (i) input impedance, Ri = (ii) output impedance, R0 = (iii) bandwidth impedance, BW = 0 (iv) gain impedance, A = The correct statement are:

In the circuit shown below the input offset voltage and input offset current are Vio = 4 mV and Iio = 150 nA. The total output offset voltage is:

In figure below assume that the diode and op-amps are ideal. For an input Vin = sin t, the output voltage V0 is:

The output voltage vout of the given circuit, for a given input signal, as shown in the above Figure, will be of the form:

If Vi = 2 V, then output V0 is:

Calculate value of i0

In a Schmitt trigger the output vo is limited by Zener diodes. Single Vs is connected to the negative input terminal (v ) and v+ = vo. The Hysteresis voltage is 1 volt. Triggering takes place for signals going through:

If Vi = 2 V, then output V0 is:

The LED in the circuit shown below will be on if i is:

In the circuit shown, R = 1 M (C = 0.5 F). Vs is a step voltage of magnitude 0.5 volt, V0 is given by:

The phase shift oscillator shown below operate at f = 80 kHz. The value of resistance RF is:

For a given circuit, the value of Vo and ACL is:

The maximum allowable value of Vin for circuit given below. Given gain of the amplifier is 200

In the circuit shown below the op-amp is ideal. If F = 60, then the total current supplied by the 15 V source is:

The value of C required for sinusoidal oscillation of frequency 1 kHz in the circuit shown below:

Calculate the value of 0:

For the circuit given below V0:

In the op-amp circuit given below the load current iL is

Figure shown a Schmitt trigger circuit op-amp. The output V0 is limited to + 10 V and 5 V connecting suitably chosen Zener diodes at the output. The lower and upper trigger voltage are respectively:

Calculate the value of A d =V0(V1 V2)

Calculate V0

Find V0

In the circuit shown below | V0 | = 1 V to a certain set of values of , R and C. | V0 | will remain as 1 V even if:

The bandwidth of an n-stage tuned amplifier with each stage having a bandwidth of B, is given by

A differential amplifier has input v1 = 1050 V and v2 = 950 V, CMRR = 1000. The error in the differential output is:

In the circuit given below, Rf provides:

The slew rate of an operational amplifier is 0.5 V/micro sec. The maximum frequency of a sinusoidal input of 2 Vrms that can be handled without excessive distortion is:

Each transistor in the darlington pair shown below has hFE = 100. The overall hFE of the composite transistor neglecting leakage current is:

A differential amplifier has RL = 10 K (equal values in both collectors), hie = 1 K, Re = 50 K, hfe = 100. The common mode gain is given by:

Increasing the value of RE in a differential amplifier:

In the op amp circuit, V0 is given by

For the op-amp shown in fig below open loop differential gain is Aod = 103. The output voltage 0 for i = 2 V is:

In the circuit, shown below I0 is given by:

A circuit shown below. The largest value of RL that can be used is:

For the op-amp circuit shown below the voltage gain A = 0/ i is:

For the circuit shown below gain is A = 0/ i = 10. The value of R is:

An op-amp has an open-loop gain of 105 and an openloop upper cut off frequency of 10 Hz. If this op-amp is connected as an amplifier with a closed-loop gain of 100. Then the new upper cut off frequency is:

Calculate 0

Find 0 for the circuit given below:

The circuit is as shown below:The ideal closed-loop voltage gain is:

If open-loop gain is Aod = 999 in the circuit of the closed-loop gain is:

The op-amp of figure has a very poor open loop voltage gain of 45 but is otherwise ideal.The gain of the amplifier equals:

For the circuit shown below, the output voltage is 0 = 2.5 V in response to input voltage i = 5 V. The finite open-loop differential gain of the op-amp is:

In a Hartley oscillator the condition for sustained oscillations is
h_fe = L₁ L₂.
If there exists mutual inductance M between coils L₁ and L₂, then the above condition will get modified as h_fe

The ideal characteristics of op-amp are:
(i) input impedance, R_i =
(ii) output impedance, R₀ =
(iii) bandwidth impedance, BW = 0
(iv) gain impedance, A = The correct statement are:

In the circuit shown below the input offset voltage and input offset current are V_io = 4 mV and I_io = 150 nA. The total output offset voltage is:

In figure below assume that the diode and op-amps are ideal. For an input V_in = sin t, the output voltage V₀ is:

The output voltage v_out of the given circuit, for a given input signal, as shown in the above Figure, will be of the form:

If V_i = 2 V, then output V₀ is:

Calculate value of i₀

In a Schmitt trigger the output v_o is limited by Zener diodes. Single V_s is connected to the negative input terminal (v) and v₊ = v_o. The Hysteresis voltage is 1 volt. Triggering takes place for signals going through:

If V_i = 2 V, then output V₀ is:

The LED in the circuit shown below will be on if _i is:

In the circuit shown, R = 1 M (C = 0.5 F). V_s is a step voltage of magnitude 0.5 volt, V₀ is given by:

The phase shift oscillator shown below operate at f = 80 kHz. The value of resistance R_F is:

For a given circuit, the value of V_o and A_CL is:

The maximum allowable value of V_in for circuit given below. Given gain of the amplifier is 200

In the circuit shown below the op-amp is ideal. If _F = 60, then the total current supplied by the 15 V source is:

Calculate the value of ₀:

For the circuit given below V₀:

In the op-amp circuit given below the load current i_L is

Figure shown a Schmitt trigger circuit op-amp. The output V₀ is limited to + 10 V and 5 V connecting suitably chosen Zener diodes at the output. The lower and upper trigger voltage are respectively:

Calculate the value of A_d = V₀
(V₁ V₂)

Calculate V₀

Find V₀

In the circuit shown below | V₀ | = 1 V to a certain set of values of , R and C. | V₀ | will remain as 1 V even if:

A differential amplifier has input v₁ = 1050 V and v₂ = 950 V, CMRR = 1000. The error in the differential output is:

In the circuit given below, R_f provides:

The slew rate of an operational amplifier is 0.5 V/micro sec. The maximum frequency of a sinusoidal input of 2 V_rms that can be handled without excessive distortion is:

Each transistor in the darlington pair shown below has h_FE = 100. The overall h_FE of the composite transistor neglecting leakage current is:

A differential amplifier has R_L = 10 K (equal values in both collectors), hie = 1 K, R_e = 50 K, h_fe = 100. The common mode gain is given by:

In the op amp circuit, V₀ is given by

For the op-amp shown in fig below open loop differential gain is A_od = 10³. The output voltage ₀ for _i = 2 V is:

In the circuit, shown below I₀ is given by:

A circuit shown below. The largest value of R_L that can be used is:

For the op-amp circuit shown below the voltage gain A = ₀/ _i is:

For the circuit shown below gain is A = ₀/ _i = 10. The value of R is:

An op-amp has an open-loop gain of 10⁵ and an openloop upper cut off frequency of 10 Hz. If this op-amp is connected as an amplifier with a closed-loop gain of 100. Then the new upper cut off frequency is:

Calculate ₀

Find ₀ for the circuit given below:

The circuit is as shown below:
The ideal closed-loop voltage gain is:

If open-loop gain is A_od = 999 in the circuit of the closed-loop gain is:

The op-amp of figure has a very poor open loop voltage gain of 45 but is otherwise ideal.
The gain of the amplifier equals:

For the circuit shown below, the output voltage is ₀ = 2.5 V in response to input voltage _i = 5 V. The finite open-loop differential gain of the op-amp is: