 
			 
			MCQOPTIONS
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				This section includes 21 Mcqs, each offering curated multiple-choice questions to sharpen your Microprocessors knowledge and support exam preparation. Choose a topic below to get started.
| 1. | The 80486 family was introduced in the year ______. | 
| A. | 1987 | 
| B. | 1988 | 
| C. | 1989 | 
| D. | 1990 | 
| Answer» C. 1989 | |
| 2. | The 80386 Microprocessor family is a _____ bit microprocessor. | 
| A. | 8 | 
| B. | 16 | 
| C. | 32 | 
| D. | 64 | 
| Answer» D. 64 | |
| 3. | 80486DX was followed by ________. | 
| A. | 80486SX | 
| B. | 80386SX | 
| C. | 80386DX | 
| D. | 80486DX | 
| Answer» B. 80386SX | |
| 4. | Which device is high-performance member of the 80386 family of MPUs? | 
| A. | 80386SX | 
| B. | 80386DX | 
| C. | 80486SX | 
| D. | 80486DX | 
| Answer» C. 80486SX | |
| 5. | In which year, 80386 microprocessor was introduced? | 
| A. | 1999 | 
| B. | 1995 | 
| C. | 1985 | 
| D. | 1990 | 
| Answer» D. 1990 | |
| 6. | The register bank of Execution Unit of 80286 is used as | 
| A. | for storing data | 
| B. | scratch pad | 
| C. | special purpose registers | 
| D. | all of the mentioned | 
| Answer» E. | |
| 7. | Which of the block is not considered as a block of architecture of 80286? | 
| A. | address unit | 
| B. | bus unit | 
| C. | instruction unit | 
| D. | control unit | 
| Answer» E. | |
| 8. | For which of the following instruction does the return address point to instruction causing exception? | 
| A. | divide error exception | 
| B. | bound range exceeded exception | 
| C. | invalid opcode exception | 
| D. | all of the mentioned | 
| Answer» E. | |
| 9. | Which of the following is not an interrupt generated by 80286? | 
| A. | software interrupts | 
| B. | hardware or external interrupts | 
| C. | INT instruction | 
| D. | All are generated by 80286 | 
| Answer» E. | |
| 10. | ________ maintains real modes protected-mode software compatibility with 80386 architecture. | 
| A. | 80486 | 
| B. | 8085 | 
| C. | 8086 | 
| D. | 80486 DX | 
| Answer» B. 8085 | |
| 11. | The device that interface and control the internal data bus with the system bus is | 
| A. | data interface | 
| B. | controller interface | 
| C. | data and control interface | 
| D. | data transreceiver | 
| Answer» E. | |
| 12. | In 80186, the timer which connects to the system clock is | 
| A. | timer 0 | 
| B. | timer 1 | 
| C. | timer 2 | 
| D. | Any one can be connected | 
| Answer» D. Any one can be connected | |
| 13. | ________ bit in ICW1 indicates whether the 8259A is cascade mode or not ? | 
| A. | LTIM=0 | 
| B. | LTIM=1 | 
| C. | SNGL=0 | 
| D. | SNGL=1 | 
| Answer» D. SNGL=1 | |
| 14. | In 8279 Strobed input mode, the control line goes low. The data on return lines is strobed in the___________. | 
| A. | FIFO byte by byte | 
| B. | FILO byte by byte | 
| C. | LIFO byte by byte | 
| D. | LILO byte by byte | 
| Answer» B. FILO byte by byte | |
| 15. | In 8279, a scanned sensor matrix mode, if a sensor changes its state, the __________ line goes ___________ to interrupt the CPU. | 
| A. | CS, high | 
| B. | A0, high | 
| C. | IRQ, high | 
| D. | STB, high | 
| Answer» D. STB, high | |
| 16. | The CPU must flush out the prefetched instructions immediately following the branch instruction in | 
| A. | conditional branch | 
| B. | unconditional branch | 
| C. | conditional and unconditional branches | 
| D. | none of the mentioned | 
| Answer» C. conditional and unconditional branches | |
| 17. | Which pins are general purpose I/O pins during mode-2 operation of the 82C55? | 
| A. | PA0 – PA7 | 
| B. | PB0-PB7 | 
| C. | PC3-PC7 | 
| D. | PC0-PC2 | 
| Answer» B. PB0-PB7 | |
| 18. | The memory management and protection mechanisms are enabled with advanced instruction set when 80286 is operated in | 
| A. | normal mode | 
| B. | real address mode | 
| C. | virtual address mode | 
| D. | all of the mentioned | 
| Answer» D. all of the mentioned | |
| 19. | The 80286 is an upward object code compatible with 8086 or 8088 when operated in | 
| A. | normal mode | 
| B. | real address mode | 
| C. | virtual address mode | 
| D. | real and virtual address mode | 
| Answer» E. | |
| 20. | The memory management and protection mechanisms are disabled when the 80286 is operated in | 
| A. | normal mode | 
| B. | real address mode | 
| C. | virtual address mode | 
| D. | all of the mentioned | 
| Answer» C. virtual address mode | |
| 21. | The fetching of program from secondary memory to place it in physical memory, during the execution of CPU is called | 
| A. | mapping | 
| B. | swapping in | 
| C. | swapping out | 
| D. | pipe lining | 
| Answer» C. swapping out | |