MCQOPTIONS
Bookmark
Saved Bookmarks
→
Digital Circuits
→
Number System in Digital Circuits
→
THE_FLIP-FLOPS_WHICH_HAS_NOT_ANY_INVALID_STATES_AR..
1.
THE_FLIP-FLOPS_WHICH_HAS_NOT_ANY_INVALID_STATES_ARE?$
A.
S-R, J-K, D
B.
S-R, J-K, T
C.
J-K, D, S-R
D.
J-K, D, T
Answer» E.
Show Answer
Discussion
No Comment Found
Post Comment
Related MCQs
On a positive edge-triggered S-R flip-flop, the outputs reflect the input condition when ________
A J-K flip-flop with J = 1 and K = 1 has a 20 kHz clock input. The Q output is _____________
What does the direct line on the clock input of a J-K flip-flop mean?
What does the circle on the clock input of a J-K flip-flop mean?
What does the triangle on the clock input of a J-K flip-flop mean?
The flip-flops which has not any invalid states are _____________
Both the J-K & the T flip-flop are derived from the basic _____________
The S-R latch composed of NAND gates is called an active low circuit because _____________
The flip-flop is only activated by _____________
How many stable states combinational circuits have?
Reply to Comment
×
Name
*
Email
*
Comment
*
Submit Reply