In CMOS implementation of a NAND gate: – McqOptions

MCQOPTIONS

1.	In CMOS implementation of a NAND gate:
A.	All the PMOS and NMOS are in series
B.	The two PMOS are in parallel and two NMOS are in series
C.	All the PMOS and NMOS are in parallel
D.	The two PMOS are in series and two NMOS are in parallel
Answer» C. All the PMOS and NMOS are in parallel

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