For an input pulse train of clock period T, the delay produced by an n stage shift register is

For an input pulse train of clock period T, the delay produced by an n

1.	For an input pulse train of clock period T, the delay produced by an n stage shift register is
A.	(n-l)T
B.	nT
C.	(n+l)T
D.	2nT
Answer» B. nT