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1. |
Consider a 3 GHz (gigahertz) processor with a three-stage pipeline and stage latencies v1, v2, and v3 such that v1 = 3v2/4 = 2v3. If the longest pipeline stage is split into two pipeline stages of equal latency, the new frequency is _________ GHz, ignoring delays in the pipeline registers |
A. | 2 |
B. | 4 |
C. | 8 |
D. | 16 |
Answer» C. 8 | |